The present invention relates generally to driver circuits and more particularly to so-called trilevel driver circuits having the capability of supplying three different level of signals to capacitive loads.
Logic circuit designers know that the use of tristate drivers has advantages in the design of computing and data processing systems which use so-called bus architectures.
Present tristate bus architecture requires low impedance, high current drivers due to high stray bus capacitance, high data rate transfer requirements and high DC static receiver current. Although it has been well known that the use of such tristate drivers has advantages for the designer of bus architectures, computer and data processing systems they have not been widely used.
Generally, limitations and the number of chip I/O pins had led product designers to use bidirectional busses in order to utilize the available input/output pins most effectively. This use of bidirectional busses is based on the premise that at any given time only one chip will be sending information to other chips within the system. However such tristate drivers are connected in multiples to a single bus in the architecture and under some conditions two or more drivers can be inadvertently and simultaneously switched to opposing logical levels. For example, a first chip could be attempting to force the bus to a 1 condition while a second chip coupled to the same line is attempting to force the same line to a 0 condition. This causes not only the information on the bus to be destroyed but it also causes the driver circuits coupled to the bus to be burned out. The use of such drivers in bus architecture has thus been inhibited due to the fact that system failures or programming errors can cause the drivers to be destroyed.
This situation, where two chips attempt to simultaneously send different or opposing logic data on the same bidirectional bus, is called an orthogonality condition. Ideally of course such an orthogonality condition should never occur within the system and can be avoided by a strict communication protocol within the system. However a program defect in the protocol software can physically damage the entire system. Moreover in such systems faults which cannot be tested without creating orthogonal states become untestable. Therefore under some conditions it may be necessary to bypass this protocol in order to fully test the system. Such damage can be particularly serious to the system architecture since a failure within the communication protocol circuitry cannot only damage the tristate driver in the chip, but can damage another one in another chip and correction of one of the damaged devices will not resolve the problem until the original fault is fully diagnosed and eliminated.
It is thus an object of the present invention to provide an improved driver circuit that will not be damaged when coupled through a bus to another driver circuit switched to an opposing logic level. The driver circuit of the invention also has high switching speed, reduced power dissipation and which is designed to provide initial current of sufficient magnitude to charge the bus capacitance during the signal transistion and subsequently reduce the current available to the bus to a value sufficient only to drive the DC load on the bus and insufficient to damage the output device even if another driver on the same line is turned on to the opposing logical level. Thus, in effect, the driver has a built-in current limiting device which prevents damage.
It is therefore an object of the invention to provide driver circuits, the use in such bus architecture in which damage due to orthogonality conditions is minimized or eliminated. It is further an object of the invention to prevent communication protocol software failure from physically damaging the system in which the tristate driver circuit is utilized. It is a further object of the invention to provide a tristate circuit in which faults in the system requiring orthogonal states can be easily and readily tested.